Oficina española de Patentes y Marcas

• They were introduced to protect the diagram of the various layers and elements making up an integrated circuit, its three-dimensional layout and its interconnections, otherwise known in short as its ‘topography’.

Protection lasts for a period of ten years starting from the end of the year in which it is exploited for the first time in the world or the topography is registered.

Go to Act 11, dated 3 May 1988, on the legal protection of Semiconductor Product Topographies.