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一种基于主从架构的多片RFSoC高速数据传输方法及系统

Resumen de: CN122547738A

本发明属于高速数据传输技术领域，具体涉及基于主从架构的多片RFSOC高速数据传输方法及系统。包括：一片主RFSoC芯片和多片从RFSoC芯片，主RFSoC芯片负责参数下发、指令分发、指令解析、数据采集、数据处理存储和DMA数据回读功能；从RFSoC芯片负责指令解析、数据采集、数据处理存储和GTY数据回传功能。与现有技术相比，本发明的有益效果：系统为一主多从架构，采用RFSoC芯片，建立分级传输机制，并通过GTY和DMA相结合的指令传输、数据回传及数据读取方式，保持主设备控制核心地位的同时，通过高速接口扩展了从设备的数据采集能力，并通过分级传输机制平衡了系统吞吐量与数据传输效率。

中性原子量子处理平台的控制方法、装置及存储介质

Resumen de: CN122549622A

中性原子量子处理平台的控制方法、装置及存储介质，涉及量子信息技术领域。控制方法包括：将中性原子量子处理平台的底层硬件通道、控制寄存器和物理变量封装为物理语义对象，以得到物理语义设备注册表；确定接收的用户指令分类是否为命令类；如果是，根据用户指令和物理语义设备注册表，生成实验规划结果；将实验规划结果转换为实验任务图；将实验任务图序列化为实验任务中间表示；将实验任务中间表示转换为中性原子量子处理平台可执行的时序与参数；根据中性原子量子处理平台执行可执行的时序与参数得到的实验结果，生成物理状态指标。该控制方法可以极大提高中性原子量子处理平台的工作效率和稳定性，并规避大模型误操作底层硬件的风险。

量子デバイス及び量子デバイスの製造方法

Resumen de: EP4788108A1

0001 A quantum device having a plurality of quantum bits (1) connected to each other via coupling wiring lines (30), wherein each of the plurality of quantum bits includes: a Josephson junction device (4); and a quantum bit electrode (50) connected to one end of the Josephson junction device; and the quantum device including: a ground electrode (51) to which the other end of the Josephson junction device is connected; an insulating region (52) between the quantum bit electrode and the ground electrode; and a guard structure (54) that is provided along a portion of the coupling wiring line extending in the insulating region and is fixed to a ground potential.

コンピュータ実装方法およびコンピュータ・システム

Resumen de: WO2025017324A1

A computer-implemented method is disclosed herein which comprises: providing a Hamiltonian representation of a physical system; using a first quantum circuit to block encode the Hamiltonian into a matrix; and using a second quantum circuit to perform a Quantum Singular Value Transformation to invert the matrix. The inverted matrix is used to provide the Green's function corresponding to the physical system for determining one or more physical properties of the physical system.

非ゼロ復帰（ＮＲＺ）増幅器システム

Nº publicación: JP2026526919A 10/08/2026

Solicitante:

ノースロップグラマンシステムズコーポレーション

Resumen de: US2025038723A1

One example includes an amplifier system. The system includes an input configured to receive an input pulse, a first input path coupled to the input and configured to provide the input pulse to a control node, and a second input path coupled to the input and comprising at least one delay element to provide a delayed version of the input pulse to the control node. The system also includes a first amplifier device comprising the control node and being configured to provide a control flux in response to the input pulse and in response to the delayed version of the input pulse. The system further includes a second amplifier device coupled to the first amplifier device, the second amplifier device being set to a flux state in response to the control flux to provide an output voltage.