Absstract of: WO2025149519A1
The described method is a method for determining an operations schedule that attributes each individual operation of two or more jobs to two or more machines, wherein the operations schedule is subject to an optimization towards an optimum of a key performance indicator indicating the performance of the operations schedule, wherein an operations schedule is initially encoded (S1, S2, S3, S4, S5) into a quantum register of a quantum computer (QC) and the optimization is performed (S6) using a variational quantum algorithm on the quantum computer (QC) acting on the quantum register and wherein an optimized operations schedule is provided (S7) by the quantum computer (QC).
Absstract of: FR3174044A1
L’invention se rapporte à un système d’interposeur thermique (5) comprenant un circuit intégré dit inférieur (1) et un circuit intégré dit supérieur (2), le circuit inférieur (1) étant configuré pour être couplé thermiquement à un premier étage thermique d’un cryostat, le circuit supérieur (2) étant configuré pour être couplé thermiquement à un deuxième étage thermique du cryostat, le circuit inférieur (1) étant positionné dans une enceinte (3) comprenant une ouverture (4), l’enceinte (3) étant configurée pour être couplée thermiquement à un troisième étage thermique du cryostat, le système (5) comprenant également un circuit intégré dit médian (6) disposé dans l’enceinte (3), au niveau de ladite ouverture (4) de façon à ce que le circuit médian (6) ferme l’ouverture (4), et dans lequel le circuit inférieur (1), le circuit supérieur (2) et le circuit médian (6) sont empilés selon un axe (7) perpendiculaire au plan de l’ouverture (4). Figure pour l’abrégé : Fig. 1
Absstract of: WO2026213127A1
Example embodiments provide methods, systems, apparatuses, computer program products and/or the like for composite optical benches. A composite optical bench may comprise: one or more beam array sources hosted by a first housing; one or more beam-specific optics hosted by one or more second housings; and one or more optional global optics hosted by one or more third housings, wherein the first housing, the one or more second housings, and the one or more third housings are aligned using: an axial alignment configuration defining axial separation of elements hosted by the first housing, the one or more second housings, and the one or more third housings; and a radial alignment configuration wherein the one or more second housings and the one or more third housings are positioned after the first housing, and wherein the one or more second housings and the one or more third housings are variously positioned.
Absstract of: US20260311027A1
0000 A recognition-enhanced quantum search system, method, and computer-readable medium are disclosed in which a quantum search process distinguishes among marked solution states, a first class of non-solution states, and a second class of non-solution states during iterative amplitude amplification. A quantum state is prepared over a search domain, an oracle operation marks one or more candidate states satisfying a target criterion, a vantage metric is determined for at least a subset of non-solution states, a recognition diffusion operation is applied relative to a recognition-weighted state representation derived from the vantage metric, and a state-dependent transform applies different phase treatments to the different state classes. In representative embodiments, stronger suppression is applied to vantage-likely non-solution states than to other non-solution states. The process may use an effective-domain value for iteration control and may attenuate or bypass the state-dependent transform when the vantage metric is unavailable or insufficiently informative.
Absstract of: US20260311907A1
A confinement assembly is provided that includes an electrode layer comprising a plurality of electrodes, one or more routing layers configured to provide respective voltage signals to respective electrodes; and a ground plane comprising a set of features in electrical communication with one another and a load ground point connection. The electrodes include at least one radio frequency (RF) electrode and are operable to generate a confinement potential configured to confinement atomic objects. The respective voltage signals provided via the routing layers include an RF voltage signal configured to be provided to the RF electrode. The set of features is in electrical communication with the RF electrode and configured to guide a return RF current to ground along an at least partially constrained path. The return RF current is generated responsive to the RF voltage signal being provided to the RF electrode.
Absstract of: US20260311025A1
Selecting annealing schedules is disclosed. In a training phase, a model is trained using a scheduling dataset storing tuples of an annealing schedule, a problem, hardware properties. The tuples are generated by iteratively solving problems from a problem dataset using different annealing schedules. After reaching a termination criterion, the best annealing schedule is included in a tuple for the problem and stored in the scheduling dataset. In an inference phase, a problem is decomposed into subproblems that are then clustered. The model is used to select or infer an annealing schedule for representative subproblems selected from each of the clusters. The inferred annealing schedules assigned to the representative subproblems are used for the subproblems in the corresponding clusters. The subproblems are solved in quantum annealers and merged to determine a solution to the original problem.
Absstract of: WO2026209568A1
A method of determining a location and velocity of one or more charged particles trapped within a charged particle trap by a trapping field is described. The charged particle trap comprises a trapping volume defined by trapping electrodes and a first pair of electrical conductors separated by at least a portion of the trapping volume along a first axis. The method comprises measuring an induced signal in each electrical conductor of the first pair of electrical conductors that is induced by the one or more charged particles' motion within the trapping volume. The measurements of the induced signals from the first pair of electrical conductors are used to determine a location of the one or more charged particles along the first axis and a velocity of the one or more particles along the first axis.
Absstract of: WO2026210900A1
A quantum bit detection module according to one aspect of the present invention comprises an image sensor and a sensor control unit. The image sensor is configured to be capable of presetting a first region and a second region, which are mutually different, as exposure regions in an imaging region. The sensor control unit has a first trigger input terminal, to which a first trigger signal is input, and a second trigger input terminal, to which a second trigger signal different from the first trigger signal is input. The image sensor performs imaging while switching between the first region and the second region in response to the first trigger signal and the second trigger signal.
Absstract of: DE102025133101A1
Quantenschaltkreis zur Anwendung eines Anregungsoperators auf ein fermionisches System zur Erzeugung eines Zielzustands mit einer Vielzahl von Qubits, wobei das fermionische System mindestens ein Ausgangsorbital und mindestens ein Zielorbital aufweist, wobei eine Anregung von dem Ausgangsorbital in das Zielorbital durch den Anregungsoperator erfolgen soll, wobei ein Ausgangs-Qubit p das Ausgangsorbital und Ziel-Qubit q das Zielorbital repräsentiert, mindestens ein erstes globales Gatter und mindestens ein zweites globales Gatter, welche jeweils gemeinsam zumindest auf das Ausgangs-Qubit p und das Ziel-Qubit q wirken, eine erste z-Rotation und eine zweite z-Rotation, die zwischen dem ersten globalen Gatter und dem zweiten globalen Gatter angeordnet sind und parallel jeweils auf das Ausgangs-Qubit p und das Ziel-Qubit q wirken, wobei durch das erste globale Gatter, das zweite globale Gatter, die erste z-Rotation und die zweite z-Rotation mindestens zwei Pauli-Rotationen des Anregungsoperators parallelisiert ausgeführt werden zur Erzeugung des Zielzustands.
Absstract of: WO2026212627A1
Methods and systems, including computer-readable media, are described for efficient computation of Fast Walsh-Hadamard Transforms on an integrated circuit. The circuit receives an input matrix with floating-point (FP) values for processing at a neural network layer. A Hadamard multiplication output is computed from the FP values using a Hadamard identity matrix. For example, the circuit obtains an input vector of the input matrix. At a first iteration, a first output is computed from vector-matrix operations performed on values of the input vector and a first sub-matrix derived from the Hadamard identity matrix. At a second iteration, a second output is computed from vector-matrix operations performed on the first output and a second sub-matrix derived from the Hadamard identity matrix. A result is computed from a divide-by-2 operation performed on the second output computed at the second iteration. The Hadamard multiplication output is computed using the result of the divide-by-2 operation.
Absstract of: WO2026207572A1
The present invention relates to spin-based logic devices, spintronics, spin quantum devices and new carbon based materials and films for use in same.
Absstract of: WO2026210061A1
A computer-implemented method for determining a quantum circuit, wherein the method comprises, by utilizing at least a first computing device, determining a quantum circuit C that implements a perturbed unitary transformation Up, wherein the quantum circuit C is determined as corresponding to a quantum circuit obtained by applying a perturbation to a primary quantum circuit Co, wherein the primary quantum circuit Co implements a predetermined unitary transformation U, by altering with selected amount(s) one or more parameters of the primary quantum circuit Co to be applied on the quantum states of the quantum elements, wherein the quantum circuit C is determined such that when the quantum circuit C is executed a plurality of times from a fixed initial quantum state |i) on N quantum elements, a predetermined final quantum state |S) is obtained with probability Pc and a difference |Pc - Pu| is within a selected range, where Pu is a probability of obtaining the final quantum state |S) when executing the primary quantum circuit Co a plurality of times from the fixed initial quantum state |i) on N quantum elements.
Absstract of: WO2026209415A1
A device comprises a superconducting parametric gyrator circuit comprising a first I/O port, a second I/O port, and a parametric multipole bandpass filter circuit coupled between the first I/O port and the second I/O port. The parametric multipole bandpass filter circuit is responsive to a first control signal and a second control signal, which have a same frequency but different phases, to perform parametric frequency mixing of the first and second control signals with an input signal applied to the first I/O port or the second I/O port, to generate an output signal which has a same frequency as the input signal and a non-reciprocal phase shift based on a phase difference between the first control signal and the second control signal, and based on a direction of propagation of the input signal between the first I/O port and the second I/O port.
Absstract of: WO2026208632A1
Embodiments of the present application relate to the technical field of quantum computing, and provide a superconducting quantum chip and a superconducting quantum computer. The superconducting quantum chip comprises a transmission line, a manipulation line, and a qubit. The transmission line may include an input line, the input line is connected to the manipulation line, and the manipulation line is electromagnetically coupled to the qubit. The input line is used for transmitting a first microwave signal sent by a microwave device to the manipulation line, and the manipulation line is used for changing the state of the qubit on the basis of the first microwave signal so as to implement quantum computing, wherein the difference between the impedance of the transmission line and the impedance of the microwave device is less than a preset value, and the impedance of the transmission line is determined on the basis of the kinetic inductance, geometric inductance, and capacitance of the transmission line. The introduction of kinetic inductance can increase the overall inductance of the transmission line, thereby increasing the impedance of the transmission line, and reducing the difference between the impedance of the transmission line and the impedance of the microwave device; when such a transmission line is used as the input line, the reflection of the first microwave signal transmitted on the input line can be reduced, thereby improving the accuracy of qubit manipulation.
Absstract of: US20260311015A1
A method of optimizing a network-based quantum computer includes coupling a plurality of contacts with a network of transport channels. The plurality of contacts includes at least one read-out contact and at least one electrostatic control contact, and each channel of the network of transport channels is coupled with a read-out contact and an electrostatic control contact. The at least one electrostatic control contact is operable to control an electric charge within the network of transport channels. The method further includes initiating an optimization algorithm coupled with the plurality of contacts to generate an optimal contact setting configuration for the plurality of contacts coupled with the network of transport channels. Additionally, the method includes adjusting the plurality of contacts according to optimal the contact setting configuration.
Absstract of: US20260311017A1
0000 A quantum computing system receives a first qubit reservation request from a first quantum service, the first qubit reservation request identifying a first quantity of qubits. A first set of qubits equal in number to the first quantity of qubits is determined based on a qubit data structure that identifies a first plurality of qubits. The qubit data structure is altered to reserve the first set of qubits for the first quantum service. Qubit reservation information that identifies the first set of qubits is sent to the first quantum service.
Absstract of: US20260311014A1
An information processing apparatus instructs a quantum computer to execute a quantum circuit in which, among first qubits having a predetermined attribute included in a plurality of qubits, a predetermined number of first qubits are in a state |1 before a gate operation specified by a first subcircuit. The information processing apparatus acquires, from the quantum computer, a measurement result indicating the state of each qubit after gate operations specified by the quantum circuit. The information processing apparatus calculates, based on the states of the first qubits indicated by the measurement result, the number of first qubits that are in the state |1 after the gate operation specified by the first subcircuit. Then, the information processing apparatus discards the measurement result, if the number of first qubits that are in the state |1 after the gate operation specified by the first subcircuit is different from the predetermined number.
Absstract of: US20260314269A1
A superconducting quantum chip including a first chip including a superconducting quantum device having a controllable resonant frequency, a second chip bonded to the first chip with a gap defined between the first chip and the second chip, and a ferromagnetic device provided on the second chip, the ferromagnetic device being configured to apply a magnetic field to the superconducting quantum device to control a resonant frequency of the superconducting quantum device.
Absstract of: US20260314275A1
A method for manufacturing an electrode structure for an ion trap includes providing a base substrate comprising a patterned metallization arrangement arranged in an insulation material on a semiconductor layer, providing an insulation substrate comprising a dielectric material, connecting a surface region of the base substrate arranged on the insulation material to the insulation substrate by means of a bonding process, and backthinning the base substrate by removing the semiconductor layer to the insulation material of the base substrate, wherein the electrode structure for the ion trap is formed by performing the step of backthinning to the metallization arrangement or by depositing a patterned surface metallization on the insulation material of the back-thinned base substrate, or wherein the electrode structure for the ion trap is formed by the patterned metallization arrangement.
Absstract of: US20260311021A1
0000 The invention relates to a computer-implemented method, to a computer program, and to a computer device as described herein. In particular, the invention relates to a hybrid digital-analog method for simulating fermion-boson interactions using superconducting circuits, where the target Hamiltonian H comprises tunnelling interactions, Coulomb repulsion, and at least one electron and phonon term such as the Hubbard-Holstein model, Hubbard model, Holstein model, and/or Bose-Hubbard model.
Absstract of: WO2026207830A1
A mobile robot navigation and map construction system. A robot mainly uses visual information to estimate its own position and landmark positions by means of a particle filtering algorithm combined with a quantum genetic algorithm, generates a navigation map by means of the estimation of the landmark positions, and finally implements path exploration by means of a backtracking tree. During the path exploration process of the robot, a two-step filtering method is used to detect landmarks, identify landmarks, and gradually confirm landmark information so as to form a topological map.
Absstract of: US20260311031A1
Technologies for providing pulse-level access in a quantum computing system based on a graph-based architecture include a compute device with circuitry configured to obtain pulse description data indicative of a graph representing one or more parameters of at least one waveform that defines at least one pulse. The circuitry may also be configured to perform analysis operations on the graph to determine properties of the at least one pulse and produce a corresponding target pulse description based on the analysis. The circuitry may be additionally configured to provide the target pulse description to a target application to produce the at least one pulse.
Absstract of: US20260311019A1
0000 This application discloses a method for preparing a quantum chip, a quantum chip, and a quantum computer, related to the technical field of quantum chips. The method includes: spin-coating a positive photoresist on a substrate, and preparing an under bump metallization (UBM) layer and an air bridge on the substrate spin-coated with the positive photoresist, to obtain a first substrate structure; spin-coating a negative photoresist on the first substrate structure, and preparing a metal column solder joint on the first substrate structure spin-coated with the negative photoresist, to obtain a second substrate structure; and removing the positive photoresist and the negative photoresist from the second substrate structure, to obtain a quantum chip including the UBM layer, the air bridge, and the metal column solder joint. By using the method provided in exemplary embodiments of this application, preparation efficiency can be improved, and performance of the chip can be improved.
Absstract of: US20260313976A1
A semiconductor quantum device according to the present disclosure includes a transistor structure portion having a source, a drain, and a gate, one or more quantum dot structure portions capable of localizing charges; and a qubit control current line capable of changing states of the charges in the quantum dot structure portions, in which the quantum dot structure portions and the qubit control current line are disposed in the same layer, and the transistor structure portion and the quantum dot structure portions are laminated in a lamination direction with respect to a substrate.
Nº publicación: US20260311023A1 08/10/2026
Applicant:
TAIWAN SEMICONDUCTOR MFG CO LTD [TW]
Taiwan Semiconductor Manufacturing Co., Ltd.
Absstract of: US20260311023A1
An annealing processor utilizes capacitive spin update circuits to generate values for determining if spin states should be updated. Each capacitive spin update circuit induces a voltage on a main capacitor via capacitive coupling with a plurality of capacitors of corresponding bit cells. Each bit cell receives a spin value and a spin coupling value. The induced charge is based, in part, on the spin values and spin coupling values.